The present invention is related to power supplies, and in particular to voltage converters.
Electrical power requirements are typically satisfied by deploying one or more power supplies in relation to a particular system. For example, telecommunication and data communication systems often employ power supplies deployed in relation to an Intermediate Bus Architecture (IBA). In some such cases, the IBA based system includes a front end AC-DC power supply that generates a DC voltage. This DC voltage is supplied to the input of an Intermediate Bus Converter (IBC) that provides isolation and converts the input voltage to a lower level DC voltage supplying numerous so called point-of-load regulators (POLs). The non-isolated POLs provide required supply voltages to specific digital or analog electronic functional blocks. The POLs are generally located close to the related electronic blocks to provide highest quality supply voltages.
The aforementioned IBC may be implemented using one of the topologies depicted in FIGS. 1a-1c. In particular, FIG. 1a shows a forward type full-bridge voltage converter topology 110, FIG. 1b shows a half-bridge voltage converter topology 120, and FIG. 1c depicts a push-pull voltage converter topology 130. Depending on input voltage range and output voltage tolerances, the IBC can be regulated with feedback loop taken from its output voltage, semi-regulated by input voltage feed-forward, or simply unregulated. Unregulated IBC implementations are often more cost effective, and generally operate at a maximum duty cycle for highest efficiency and power density.
Such unregulated voltage converters exhibit various performance limits. For example, operation at the typical maximum duty cycle results in very low ripple current at a nominal condition because the voltage after the rectification has practically a one hundred percent duty cycle. During start up, however, the duty cycle is gradually increased from zero to one hundred percent. The output inductor peak-to-peak current ripple AIL is defined by the following equation:
            Δ      ⁢                          ⁢      IL        =                  Vin        *                  D          ⁡                      (                          1              -              D                        )                                      2        *        N        *        L        *        F              ,where Vin is the voltage input to the primary winding of any of the circuits of FIG. 1a-1c, D is the duty cycle, and F is the frequency of the clock provided to transistors connected to the voltage input side of the circuits of FIGS. 1a-1c, L is the inductor on the voltage output side of the circuits of FIGS. 1a-1c; and N it the turns ratio of the transformer of the circuits of FIGS. 1a-1c. Based on this equation, during start-up the current ripple will become substantial as the circuits of FIGS. 1a-1c transition from a duty cycle of zero to a duty cycle of one hundred percent. One previous solution to resolving this problem has been to design for the increased ripple during start-up or to greatly increase the size of the inductor in the circuits of FIGS. 1a-1c. It is often not acceptable to have such a high current ripple, and adding a large inductor can substantially increase the cost, size and power losses of such IBC circuits.
Thus, for at least the aforementioned reasons, there exists a need in the art for advanced approaches to voltage conversion.